如何设计标准单元库.pptVIP

Standard Cell Tutorial By: Wei Lii Tan Advisor: Dr. Robert Reese This revision: September 02, 2001 Introduction This tutorial will guide you through creating a standard cell library, and integrating that standard cell library into the Cadence design flow. The following CAD Tools will be used in this tutorial: - Cadence ICFB - Cadence Abstract Generator - Cadence Design Planner - Synopsys Design Compiler - HSPICE Introduction The following conventions will be used in this tutorial: - File names will be in italics, e.g. /ccs/issl/micro/users/tan/myfile.vhd - User input (e.g. what you need to type) will be in boldface, e.g. type swsetup cadence-ncsu *important*All directories will start with your_work_directory/add_stdcells, unless specified otherwise. How standard cell information is passed to different CAD Tools Guidelines to Creating a Standard Cell Library A standard cell library must contain at least the following cells to be able to implement any function: - NAND - NOR - NOT - DFF Additionally, you can expand the standard cell library to include additional cells like Tie-high, Tie-low cells, I/O Pads, and multiple-input gates (e.g. a 4-input NOR gate). Guidelines to Creating a Standard Cell Library Dr. Robert Reese has a page that provides excellent information on standard cell guidelines. The webpage can be accessed at: /~reese/EE8273/lectures/stdcellroute/stdcellroute.pdf. (You will need PDF reader) The following pages will discuss the requirements for a standard cell. Guidelines to Creating a Standard Cell Library All cell layouts must adhere to DRC rules for the technology in use. MOSIS provides a website with rules for technologies supported by MOSIS. To view the website, go to /Technical/Designrules/scmos/scmos-main.html Guidelines to Creating a Standard Cell Library Vertical and Horizontal Routing Grids: Cell pins, with the exception of abutment pins (VDD and GND) must be placed on the intersections of the vertical and horizontal routing