无与伦比的并行处理-FPGA加速的根本基石.pdfVIP

赛灵思技术日 XILINX TECHNOLOGY DAY 无与伦比的并行处理 - FPGA 加速的根本基石 朱 勇 Xilinx 大中华区业务拓展总监 2019 年 3 月 19日 FPGA 加速 : 大幅提升应用的性能 Without acceleration CPU func1 func2 func3 func4 With FPGA acceleration CPU func1 func3 func4 FPGA func2 FPGA handles compute-intensive, deeply pipelined, massively parallel operations. CPU handles the rest © Copyright 2019 Xilinx 定制化的架构 – FPGA 的优势 CPUs and GPUs ˃ Fixed instruction set and rigid memory hierarchy ˃ Developer adapts the program to the architecture FPGAs ˃ Flexible, fully customizable architecture ˃ Developer adapts the architecture to the program © Copyright 2019 Xilinx FPGA – 绝佳的并行处理器件 ˃ No predefined instruction set or underlying architecture ˃ Developer customizes the architecture to his needs Custom datapaths Custom bit-width Custom memory hierarchies ˃ Excels at all types of parallelism Deeply pipelined (e.g. Video codecs) Bit manipulations (e.g. AES, SHA) Wide datapath (e.g. DNN) 2.5 million system logic cells Custom memory hierarchy (e.g: Data analytics) 6,800 DSP engines ˃ Adapts to evolving algorithms and workload needs 345 Mb on-chip memory © Copyright 2019 Xilinx 定制化的架构 – 加速的关键 ˃ Custom datapaths, parallel and pipelined ˃ User-defined bitwidths ˃ Custom dataflow pipelines ˃