第四讲 ARM指令系统和编程(2013).ppt

* * * Mention A bus and B bus on 7TDMI core. Give examples: ADD r0, r1, r2 ADD r0, r1, r2, LSL#7 ADD r0, r1, r2, LSL r3 ADD r0, r1, #0x4E * * Could have used 12 bits directly for immediate value - this would allow 0-4095. But this does not allow any large numbers, which are useful for: base address of memory devices in target system large, but simple hex constants (0x10000) Research has shown there is a need for a large range of small numbers (frequently needed) but also some large numbers. 50% of all constants lie between the range -15 and +15 and 90% lie in the range -511 and +511. Will vary depending on the application. ROR #n is confusing… but can be considered as ROL #32-n Opcode 0xe3a004ff = MOV r0, #0xff, 8 Core rotates 0xff right by 4 pairs of bits = MOV r0, #0xff000000 * Point out that it is 8-bit value shifted to anywhere within the 32-bit word (but must be an even number of bits). Other bits are zeros. Mention that ROR#2,4,6 (not shown) will split the 8-bit immediate with some bits at bottom of word and some at top. mov r0, #256 ; mov r0, #0x100 mov r1, #0x40, 30 ; mov r1, #0x100 etc. This method of generating constants allows 3073 distinct values, about 25% fewer than if 12-bits were used without modification. They are, however, a much more useful set of values. * Rotate left can be implemented as rotate right (32-number), e.g. rotate left of 10 is performed using rotate right of 22. RRX shifts by 1 bit position, of a 33 bit amount (includes carry flag). Very specialized application (e.g. encryption algorithms). Cannot be generated by C compiler. We have used it for 64/64 bit divide. RRX allows you to shift multiprecision values right by one efficiently. Also used in ARM’s MPEG code in a very tricky piece of code. ANSI C does not have a rotate operation (it only has ““ and “” which are the equivalent of LSL, LSR and ASR). However the ARM compiler recognizes rotate type expresssions and optimizes these to use ROR, e.g. int f(unsigne