Nios_II_peripheral_handbook-嵌入式可编程逻辑.pdf

Altera Embedded Peripherals Handbook 101 Innovation Drive San Jose, CA 95134 (408) 544-7000 NII5V3-5.0 Copyright © 2005 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device des- ignations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Al- tera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Alteras standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the ap- plication or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published in- formation and before placing orders for products or services. Printed on recycled paper ii Altera Corporation Contents Chapter Revision Dates xi About This Handbook xiii Introduction xiii How to Contact Altera xiv Typographic Conventions xiv Section I. Memory Revision History Section I–2 Chapter 1. SDRAM Controller with Avalon Interface Core Overview 1–1 Functional Description 1