微电子芯片失效分析培训课件.pptx

微电子芯片的失效分析

内容提要

1.芯片结构及元器件工作原理

2.芯片失效机理

3.芯片失效分析技术

芯片的制造：单晶、硅片、晶圆、芯片、封装、组装

集成电路的发展

PENTIUM4

42millioncomponents

0.18μm

1.7GH2

·Actualcross-sectionofamodernmicroprocessorchip.Notethemultiplelevelsofmetalandthe

planarization.

集成电路的发展

Pasitation1

Al-CnAlloyUSG

IMD3USG

Metal3AlsCuAlloy

IMD2USGW

M2

IMD1USGW

AIⅢ

PMBPSG

Sπ

Cntact

stud

Loeal

Wardinteroaneet

line

Diffusion

Applications:Interconnection

Ckbal

iaterconneet

补偿性超效应晶

体管器件结构剖

面示意图

芯片互联结构实物照片

芯片多层互联线结构剖面示意图

TiSi]

Sidewall

Spacex,USG

PMDBurierNitride

133

TiN,ARC

Metal1.Al-Cu

BPSG

CMOS:StandardMetallization

P-Well

P-Ep

P-Wafer

W

P-Well

p-epi

P-wafer

TiNARC

T:

Pasivation2SiliconNitride

N-Well

Poly-Si

T:/T₁N

N-Well

Ti/TiN

Ti/TiN

TiSiy

PaD

双极型晶体管原理

ABSENCEOFELECTRONS

0RHOLES

PNJUNCTION

0.0。0.0(Q0

ADDBORON(B}TO

GETPDOPEDREGION

FORWARDBIASEDJUNCTION(ALLOWSCURRENTFLOW)

AEVERSEBIASEDJUNCTION

INOCURRENTFLQW)

UNBCUNOELECTRONS

PHOSMOROUSDOPIN

DEPLETIONREGION

双极型晶体管工艺

NPNBipolarTransistor

COLLECTOR

OXIDE

BASE

(b)

C

放大条件：

1°W₀Lb

20发射结正偏

3°集电结反偏

双极型晶体管工作原理

n型p型发射区(E)基区(B)

n型

集电区(C)

7

MOS场效应晶体管原理(NMOS)

CMOS工艺流程

P-typesubstrae

Padoxide

SihconnitndeSiliconnitride

SticonntrndeSiO₂

BPSG

SiO₃

P-typesubstrate

P-typesubstrate

P-typesubstrate

Paypesubstrale

N-well

p

SiGeS/DPMOS

1.2nmUItra-thinSiO2

High-KMetal-GateOptions

2007

50nmLength

(Production)30nm

30nmLength

(Development)

90nmNode

200365nmNode

2005

45nmNode

器件的不断小型化

(Research)

Non-planarTri-GateArchitectureOption

32nmNode

2009

25m

15m

2015-2019

Research

II-VDevicePrototype