微电子技术论文7582481.pdfVIP

4240IEEETRANSACTIONSONELECTRONDEVICES,VOL.63,NO.11,NOVEMBER2016

LateralInAs/Sip-TypeTunnelFETsIntegrated

onSi—Part2:SimulationStudyofthe

ImpactofInterfaceTraps

SaurabhSant,KirstenMoselund,SeniorMember,IEEE,DavideCutaia,StudentMember,IEEE,

HeinzSchmid,Member,IEEE,MattiasBorg,Member,IEEE,

HeikeRiel,SeniorMember,IEEE,andAndreasSchenk

Abstract—ThispartofthepaperpresentsTCADsimulations60mV/decadeatroomtemperature.ForasubthermalSS,

oftheInAs/Silateralnanowire(NW)tunnelFET(TFET)withitisnecessarytoutilizeadevicethatdoesnotoperateon

thesamegeometryasthefabricateddevicediscussedinthethermionicemission.ThetunnelFETs(TFETs)workingon

firstpart.Inadditiontoband-to-bandtunneling,trap-assisted

tunneling(TAT)attheInAs/SiandInAs/oxideinterfaceswastheprincipleofband-to-bandtunneling(BTBT)areconsid-

considered.Averygoodagreementisfoundbetweenthesimula-eredapotentialcandidatetoreplaceMOSFETsassolid-state

tionresultsandexperimentaltransfercharacteristicsofdifferentswitches[1].Althoughsimulationshavepredictedthatideal

devices.Thesimulationsconfirmthatthetransfercharacteristicshetero-TFETscanachieveasubthermalSS,thefabricationof

inthesubthresholdregimeoftheTFETsareentirelydominatedaTFETwithsufficientON-currentandsubthermalSSovera

byTAT.Duetothehighconcentrationofgenerationcentersat