微电子技术论文7581051.pdfVIP

IEEETRANSACTIONSONELECTRONDEVICES,VOL.63,NO.11,NOVEMBER20164185

RaisedSource/DrainDopinglessJunctionless

AccumulationModeFET:DesignandAnalysis

SindhuRamaswamyandMamidalaJagadeshKumar,SeniorMember,IEEE

Abstract—Wedesignandanalyzearaisedsource/draindop-FET(RDJAMFET).Theraisedsource/drainstructuresare

inglessjunctionlessaccumulationmodeFET(RDJAMFET)onstudiedandfabricatedinpolysiliconjunctionlessThinFilm

anintrinsicsiliconfilmusingchargeplasmaconcept.ThisTransistor(TFTs)toreducetheshortchanneleffects[7].

devicedoesnothaveanyphysicaldopingorjunctions.Using

2-Dsimulations,wedemonstratethatbymakinguseoftheHowever,inthispaper,using2-Dsimulations,wedemonstrate

physicaldesignparameters,thedevicecanachievereducedband-thattheraisedsource/drainandthedopinglessnatureof

to-bandtunneling-inducedparasiticbipolartransistoractioninthedeviceminimizestheband-to-bandtunneling(BTBT)-

theoff-stateascomparedwiththeplanardopinglessjunctionlessinducedparasiticbipolaraction[8],[9]intheRDJAMFET

FET(DJFET)forsub-20-nmchannellengthdevices.Further,intheOFF-state,therebyreducingtheOFF-statecurrentof

theRDJAMFEThasbettergatecontrolandshowssignificant

improvementsintermsofdrain-inducedbarrierlowering,sub-sub-20-nmchannellengthnanoscaledeviceswhencompared

thresholdswing,andION/IOFFascomparedwiththeDJFETforwiththeplanardopinglessJLFET(DJFET)[10].Furthermore,

sub-20-nmchannel