CPLDFPGA可编程器件原理与应用系统设计.docVIP

CPLD/FPGA可编程器件原理与应用系统设计 摘 要 单片微型计算机(单片机)自问世以来， 因其小巧灵活、成本低、控制能力强、易于产品化等优势， 在社会各领域中得到广泛的应用。然而， 随着信息时代的到来， 传统单片机固有的结构缺陷， 使其呈现出诸多弊端，其速度、规模、性能等指标越来越难以满足用户需求。因此单片机芯片的开发、升级面临着新的挑战。CPLD 的出现为单片机芯片重构开辟了新的途径。本论文利用CPLD 做载体，借助MAX+PLUSⅡ 软件平台，设计了一个小型单片机系统。本文主要阐述了应用CPLD 技术实现单片机系统的方法。 论文采用硬件描述语言VHDL 设计了8 位单片机系统。根据设计流程，首先将单片机划分成CPU 和外围模块，再向下划分成功能单一的模块，然后对各个模块进行VHDL 代码描述。再应用开发系统中的各种工具进行编译仿真， 最后下载到CPLD 器件中实现硬件电路。设计完成后， 给出了单片机的各种操作时序以及指令系统。并根据此单片机的指令系统编写汇编程序， 验证了单片机各条指令的功能。 论文选用Altera 公司的ACEX 1K 系列器件EP1K100QC208-2 来实现最终的单片机电路。ACEX 1K 系列器件基于SRAM 工艺， 由于SRAM 的易失性， CPLD 本身无法保存配置数据。针对这一特点， 对其下载方法进行了研究， 并开发了208 管脚CPLD 器件的配置印刷电路板。此印刷电路板具有两种配置方式， 一种是采用下载电缆直接为器件编程， 另一种方式是采用配置器件保存配置数据。 本论文的研究表明， 应用CPLD 技术实现单片机结构设计的方法是完全可行的。以CPLD 所构造的单片机符合单片机快速、高效、小型、外围电路内装化的发展趋势。 关键词 CPLD；VHDL； 单片机； 印刷电路板； maxplus Abstract Since it was invented, single-chip microcomputer (SCM) has been applied in many fields widely because it is cabinet, flexible and it’s low cost, powerful controlling and easily manufacturing. But with the coming of the communication age, the disadvantage of the traditional SCM was discovered because of its connatural structure defect. Its speed, scale and performance can’t meet more and more requirements of the users. So the development and upgrading of SCM is faced with new challenges. The complex programmable logic device (CPLD) breaks a new path for the reconformation of SCM. Based on CPLD and MAX+PLUS Ⅱ a fundamental SCM system was designed. This thesis mainly expatiated a method that uses CPLD to design SCM. An 8 bits SCM was designed with VHSIC hardware description language (VHDL). According to the designing course, firstly, SCM was divided into different modules that the function was single. Secondly, every module was described with VHDL. Then all programs were compiled and simulated. Finally, programs were downloaded to the CPLD. After the designing was finished, the instruction system and operating scheduling were given. Then an assembly program was composed to test and verify the