基于多端口存储器互连结构的多处理器系统芯片设计.pdfVIP

第30卷第4期 电子器件 v01．30No．4 2007年8月 chi””Jo““81饼E1。。‘。”Ⅸ耐ce8 Aug．2007 of MPM—BasedInterconnectArchitecturefor MP-SoC DesigII 乞卫}NG．F口咒一￡口i1，A咒d形工t祝，20口2 o，h，or7m￡i册i僦Pn以西29i邶新增‰，痂增队i御丐蚴，．，im行250100，吼i嗽5 ／1．＆p抓脚瓜(锄灯＆^00z 、 the between in of Abstract：Oneof isinterconnectarchitecture importantquestions multi—processorsdesign third on thatis mem— on We a kindnetworkinterconnectarchitecture systemchip． propose chip multkport ories—basedinterconnectarchitecturebehindofthebus—basedandswitch—basedinterconnectarchitecture． Weuse the simulationfunctionofdatatransferbe— VHDI。des逸nmulti—clock，multi—portmemories，serve tween withEDAt001sand thecharacteristicof multi—processors analyze interconnectarchitecture．ResearchshowstheMPIⅥ一basedinterconnectarchitecturehas based asyn— data buffer Ithasthe tocutdown timeofdatatrans— chronoustransfer，datafunction． strongpoint latency ferbetween andthematrix ofMP—SOCisextendable． processors topology Network。nInterconnect System。nChips)； Chip Arehitecture； KeyⅥ叼frds：MP—SoC(Multi-processors Memories(MPM)一based；Bus—based；Switch—based Multi—port EEACC：2570 基于多端口存储器互连结构的多处理器系统芯片设计 曾凡太1，安惴．依万诺夫2 ，1．山东大学信息学院，实验中心，济南250100；