计算机组成课件 The Memory System-II.pdfVIP

SFTW230: Systems and Networks I Computer Organization Topics covered: Chapter 5. The Memory System (II) Dr. WU Wen, FST, UM Outline Interleaving memory access across memory modules Virtual memories Secondary storage devices 1 5.6.1 Interleaving The main memory is structured as a collection of physically separate modules. Each module has its own address and data buffer register (ABR DBR). … … Main memory We hope the address of fetching data can be evenly distributed -- several modules are kept busy during the execution process. This is called “interleaving memory accesses” across several memory modules. 2 Interleaving How to let the addresses distribute over the modules? Two possible address layouts. Which scheme below can be interleaved? Interleaving memory accesses can hide access latency • Faster access to a block of data In interleaved • Higher average use of the memory system structure, there must be 2k modules. 3 Example: the effect of interleaving is substantial Suppose we have a cache with 8 words/block On a read miss, we need to load a block of data from main memory. What’s the time needed? It takes 1 clock cycle to send an address to the main memory and one to send back to cache. DRAM allows the first word to be accessed in 8 cycles, and subsequent words of t