《微电子电路英文版(Adel_S.Sedra)_第1章》.pptVIP

Figure E1.23 Figure 1.28 A logic inverter operating from a dc supply VDD. Figure 1.29 Voltage transfer characteristic of an inverter. The VTC is approximated by three straightline segments. Note the four parameters of the VTC (VOH, VOL, VIL, and VIH) and their use in determining the noise margins (NMH and NML). Figure 1.30 The VTC of an ideal inverter. Figure 1.31 (a) The simplest implementation of a logic inverter using a voltage-controlled switch; (b) equivalent circuit when vI is low; and (c) equivalent circuit when vI is high. Note that the switch is assumed to close when vI is high. Figure 1.32 A more elaborate implementation of the logic inverter utilizing two complementary switches. This is the basis of the CMOS inverter studied in Section 4.10. Figure 1.33 Another inverter implementation utilizing a double-throw switch to steer the constant current IEE to RC1 (when vI is high) or RC2 (when vI is low). This is the basis of the emitter-coupled logic (ECL) studied in Chapters 7 and 11. Figure 1.34 Example 1.6: (a) The inverter circuit after the switch opens (i.e., for t ? 0?). (b) Waveforms of vI and vO. Observe that the switch is assumed to operate instantaneously. vO rises exponentially, starting at VOL and heading toward VOH . Figure 1.35 Definitions of propagation delays and transition times of the logic inverter. Figure P1.6 Figure P1.10 Figure P1.14 Figure P1.15 Figure P1.16 Figure P1.17 Figure P1.18 Figure P1.37 Figure P1.58 Figure P1.63 Figure P1.65 *Microelectronic Circuits - Fifth Edition Sedra/Smith Copyright ? 2004 by Oxford University Press, Inc. PowerPoint Overheads for Sedra/SmithMicroelectronic Circuits 5/e ?2004 Oxford University Press. Oxford University Press?Oxford New YorkAuckland Bangkok Buenos Aires Cape Town Chennai Dar es Salaam Delhi Hong Kong Istanbul Karachi KolkataKuala Lumpur Madrid Melbourne Mexico City Mumbai NairobiS?o Paulo Shanghai Taipei Tokyo Toronto?Copyright ?