课件ppt-浙江大学计算机系统结构实验室.ppt

Device_GPIO_7seg模块代码 module Device_GPIO_7seg( clk, rst, GPIOe0000000_we, Test, disp_cpudata, Test_data0, Test_data1, Test_data2, Test_data3, Test_data4, Test_data5, Test_data6, disp_num ); input clk,rst,GPIOe0000000_we; input [2:0] Test; input [31:0] disp_cpudata, Test_data0, Test_data1, Test_data2, Test_data3, Test_data4, Test_data5, Test_data6; output[31:0]disp_num;? reg [31:0]disp_num; // 7 Segments LEDs read and write CPU state display always @(negedge clk or posedge rst) begin if(rst) disp_num = 32hAA5555AA; e