Bonding and electromigration of 30um fine pitch.ppt

Assembly and Reliability Technology Dept./Package Technology Div. Electronics and Optoelectronics Research Laboratories Bonding and electromigration of 30?m fine pitch micro-bump interconnection Speaker: Chau-Jie Zhan E-mail: itri960087@itri.org.tw Page 1 Introduction 3D-IC Technology Why stacking chips in 3D? Improve Interconnect Density Reduced Form Factor Increase Speed, Reduce Power Consumption Reduced Parasitic Capacitance/Inductance Provide Heterogeneous Integration Intel CPU + memory Page 2 Three-dimensional chip stacking technology has received increasing attention due to the new requirements of microelectronic packaging in the trend of high packaging density and miniaturized features for information devices. 3D-IC Application Forecast Page 3 Wafer/Chip bonding Ref. Kinckerbocker et al, IBM Journal of Research and Development, 2008. Assembly with fine pitch and high density solder bump interconnections will become a critical process in advanced 3D chip stacking technology. Page 4 Ref. Huebner et al, Microelectronic Engineering, 2006. Solder Micro bump When the electronic packaging technology develops toward the trend of fine pitch and high I/Os, the evaluation of joint reliability is more important with the joint size becoming smaller. Page 5 Objective Chip to chip bonding with a bump pitch of 30?m and low-volume lead-free solder bump interconnections. To understand the electromigration behavior on the fine pitch solder micro bump interconnection. Page 6 Experimental Si Si Cu Cu Cu Cu Ni Ni SnAg SnAg SnAg SnAg Chip to Chip stacking Chip to Chip Test Vehicle Chip: 5.1mm ? 5.1mm Chip carrier: 15mm ? 15mm Electroplating Sn2.5Ag solder on Cu/Ni or Cu UBM Cu/Ni UBM: 5?m/3?m Cu UBM: 8?m SnAg solder: 5?m (Thickness), 18?m (Diameter) More then 3000 solder micro bumps on both the silicon chip and silicon carrier. Page 7 Process flow of solder micro bump bonding Z-axis control Thermal-Compression bonding Without flux Bonding temperature: