Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing.docVIP

Sensors 2011, 11, 2282-2303; doi:10.3390/s110302282 OPEN ACCESS sensors ISSN 1424-8220 /journal/sensors Article Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing Ignacio Bravo *, Javier Bali?as, Alfredo Gardel, José L. Lázaro, Felipe Espinosa and Jorge García Electronics Department, University of Alcala, Alcala de Henares, Madrid 28871, Spain; E-Mails: balinas@ (J.B.); alfredo@depeca.uah.es (A.G.); lazaro@depeca.uah.es (J.L.L.); felipe@depeca.uah.es (F.E.); jorge.garcia@depeca.uah.es (J.G.) * Author to whom correspondence should be addressed; E-Mail: ibravo@depeca.uah.es; Tel.: +34-9188-56580; Fax: +34-9188-56540. Received: 10 December 2010; in revised form: 2 February 2011 / Accepted: 12 February 2011 / Published: 24 February 2011 Abstract: This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is p