FPGA应用实验板设计.docVIP

FPGA应用实验板设计 学生姓名 院系名称 专业名称 电气工程及其自动化 班 级 学 号 指导教师 完成时间  FPGA应用实验板设计 内容摘要 本设计论述了一个具有电子钟功能、配合EDA教学内容的FPGA应用实验板。FPGA应用实验板由FPGA核心板和输入输出电路板组成。开发软件为Quartus II 7.2，运用VHDL语言编程。划分电子钟的编程模块如下：分频模块、计数器模块、闹铃调整模块、译码模块、动态扫描模块。 根据EDA教学的实际情况，采用Cyclone II系列EP2C5Q208C8器件设计出FPGA应用实验板，硬件能够调试通过，能够通过USB Blaster及ByteBlaster II下载线采用JTAG模式和AS模式配置下载相应的软件程序，通过了硬件仿真，可以修改当前时间和闹铃时间及设定闹铃是否可用。 本设计具有开发周期短，成本低廉，便于修改设计的优点，同时，易于进行功能扩展，对教学研究和产品开发都有引导作用。学生能够通过该实验板完成与电子钟相关的按键输入、数码管显示、计数器设计等实验内容，有利于教学内容的形象化，加深了学生对EDA知识的学习。 关键词 :电子设计自动化 单片电子系统 FPGA应用实验板 电子钟 Design of a FPGA Application Board Abstract This thesis discusses a FPGA Application Board with the fuction of an electronic clock for the EDA teaching courses.The FPGA Application Board consists of a FPGA core board and a interface board.The development software is Quartus II 7.2, while using VHDL language to program.The program module parts are as follows: the divide frequency part module, the counter part module with full carry bit, the alarm adjustment part module, the decode part module, the dynamic scanning part module. According to the actual situation of EDA teaching, adopts Cyclone II series EP2C5Q208C8, then makes the correct circuit design and finishes hardware, it can download and debug on the software program with USB Blaster and ByteBlaster II download cables by JTAG-based configuration and AS configuration, which can change the current time and alarm time, set alarm state is able or not. This design has the advantages of short development cycle, low cost, easy to modify the design, at the same time, easy to expand fuctions. It has the promising effects in teaching courses and product development.Students can finish some experiments that relate to electronic clock on this FPGA application board, such as buttons input, digital displaying, counter designs.The board helps students to visualize the teaching contents,deepen the knowledg about EDA. Key words: EDA SoC FPGA Application Board Electronic Clock目录 1 绪论 1