VLSI课后习题.pdfVIP

P32 1-4 Draw a logic diagram for a full-adder .Name each logic gate.Draw a four-bit adder as a type.Draw the component is repeated,you can draw its sub-components once and refer to them elsewhere in the diagram. 1 P32 1-4 题目要求 (1)画出1位全加器的逻辑图 (2)给每一个逻辑门命名 (3) 由四个一位加器组成一个四位全加器 (4) 给四位全加器中的每一个器件命名 (5) 画出器件层次化图（从四位全加器到逻辑门， 如有重复可在图上标注参考其它器件） 2 1位全加器真值表 a b c sum carry 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 0 0 1 0 0 1 1 0 1 0 1 0 1 0 1 1 0 1 1 1 1 1 1 3 逻辑表达式 sum abc abc abc abc (ab)c (ab)c (ab)c carry abac bc abac bc abac bc 4 1bit full adder schematic 5 4bit full adder schematic cout A[3] B[3] a3 Sum[3] A[2] a2 Sum[2] B[2] A[1] a1 Sum[1] B[1] A[0] a0 Sum[0] B[0]