处理器内部以补码表示有符号数.pptVIP

Chapter 280x86 Microprocessor Architecture;2.1 Architectural overview; ? 16-bit Arithmetic Logic Unit ? 16-bit data bus (8088 has 8-bit data bus) ? 20-bit address bus - 220 = 1,048,576 = 1 meg The address refers to a byte in memory. In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15). The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The 8088 needs two operations in either case. The least significant byte of a word on an 8086 family microprocessor is at the lower address. ; Similar architecture; Same: EU., Instruction system, addressing code, programming mode. Difference: Data bus 8086-16bit, 8088-8bit Instruction array 8086-6byte, 8088-4byte Some pins and their functions;Architecture;ALU General Register -8 Flag Register Circuit for execution and control;Adder for address Segment Register -4 Instruction Array I/O control circuit The bus interface unit (BIU) is responsible for controlling the address and data busses when accessing main memory. If a cache is present on the CPU chip then the BIU is also responsible for accessing data in the cache. The BIU fetches instructions using the CS and IP, written CS:IP, to construct the 20-bit address. Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode. ;To understand how to improve system performance, it’s time to explore the internal operation of the CPU. ;8088 Instruction operation;2.2 CPU Registers;Because registers are on-chip and handled specially by the CPU, they are much faster than memory. Accessing a memory location requires one or more clock cycles. Accessing data in a register usually takes zero clock cycles. Therefore, you should try to keep variables in the registers. Regis