第三章VHDL硬件描述语言A.ppt

第三章VHDL硬件描述语言;什么是VHDL？; Graphic is what you draw is what you get “ tell me what hardware you want and I will give it to you” VHDL is what you write is what functional you get “ tell me how your circuit should behave and the VHDL compiler will give you the hardware that does the job” but the designer can not control how the circuit implement ;Why using VHDL instead of Graphic;VHDL Synthesis vs. other HDLs Synthesis;——简单组合电路的VHDL描述举例;【例3-1】 ENTITY mux21a IS PORT( a, b : IN BIT ; s : IN BIT; y : OUT BIT ) ; END ENTITY mux21a ; ARCHITECTURE one OF mux21a IS BEGIN y =