定做毕业论文.docVIP

英文： Part IIContinuous Real-Time Signal Processing The previous installment of this series provideddetailed overviews of the TigerSHARC (ADSPTS101)and the G4 PowerPC with Altivec(MPC7410 MPC7455) processors, along with adiscussion of the importance of I/O bandwidth andthe bandwidth-to-processing ratio (BPR) in realtimesignal processing applications. It was shownthat oft quoted peak performancebenchmarks canbe misleading when used to infer real-world performance,and that measuring sustained, or continuous,algorithm performance is much moreindicative and informative regarding the comparisonof these processors. Finally, it was proposedthat the continuous 1024-pt cFFT algorithm is anexcellent indicator of real-world performance, andpredictions were made for the performance of theseprocessors, both at the processor and board level.For this article, continuous 1024-pt cFFT algorithmbenchmarks were actually coded, optimized, andmeasured on the ADSP-TS101 at 250 MHz and onthe MPC7410 at 400 MHz. Unlike someother“system-level” benchmarks, these implementationsof the continuous cFFT benchmarks tookadvantage of all the features of each processor that could improve performance - since this approach ismore like what would be implemented by an engineerdesigning a real system. The results arereported in detail, along with extrapolations forother variants and speeds, as well as board-levelimplications. 1. TigerSHARC Implementation The continuous cFFT algorithm was implementedon a BittWare Tiger-PCI board (TSPC) that featuresa cluster of four (4) ADSP-TS101 Tiger-SHARCs running at 250 MHz. The benchmarkcode was written in C and was developed usingAnalog Devices VisualDSP++; it was loaded on tothe board using BittWares BittWorks toolkit. As was shown in Part I, it is expected that runningcontinuous cFFTs on the TigerSHARC will be processorlimited, implying that the continuousbenchmark performance will be driven by the performanceof the cFFT algorithm itself. It is, therefore,critica