sigma-delta adc中多级数字抽取滤波器的研究与设计-research and design of multistage digital decimation filter in sigma - delta adc.docx

ABSTRACTSigma-Delta ADC is composed by the previous-stage Sigma-Delta modulator and post-stage digital decimation filter, although the ADC conversion accuracy and speed is mainly determined by the modulator section, but the decimation filter has decided the entire chip area and power consumption. In todays IC design, low power and low cost is the trend, so the research of digital decimation filter in Sigma-Delta ADC also has very important significance.This article first studied the principle of Sigma-Delta modulator, the oversampling technology and noise shaping and multi-bit quantitative technology, and then determine the appropriate filter structure based on the characteristics of the modulator. This paper analyzes the digital filter’s principle of the decimation filtering, and in order to save hardware resources using multi-stage filter cascade structure. The first stage filter using CIC decimation filter to achieve 32 times down-sampling. The second stage uses CIC compensation filter to compensate for the CIC decimation filter’s passband attenuation. We use inverse sinc filter to realize and achieve two -fold down-sampling. The third stage uses half-band filter, also achieved two-fold down-sampling. The three filters are cascaded to achieve a filter with a sampling rate of 6.4MHz, oversampling rate of 128, data accuracy 14bit, signal bandwidth of 25kHz, SNR greater than 85dB.This paper analyzes the principle and structure of each stage filter, and completed the design of each stage filter and each filter was realized with Verilog code. Also through the use of CSD coefficient optimization, multi-phase structure the last two stage filters were optimized. Finally, we completed the performance and functionality’s simulation of the decimation filter through modeling and simulation in Simulink, Verilog code simulation and FPGA verification, and results show that the design reaches a predetermined design goals. In addition, the paper also compared the implementations