The Case for a Single-Chip Multiprocessor单片机处理的实利.pdfVIP

The Case for a Single-Chip Multiprocessor Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ken Wilson, and Kunyung Chang Computer Systems Laboratory Stanford University Stanford, CA 94305-4070 Abstract To understand the performance trade-offs between wide-issue pro- cessors and multiprocessors in a more quantitative way, we com- Advances in IC processing allow for more microprocessor design pare the performance of a six-issue dynamically scheduled options. The increasing gate density and cost of wires in advanced superscalar processor with a 4 × two-issue multiprocessor. Our integrated circuit technologies require that we look for new ways to comparison has a number of unique features. First, we accurately use their capabilities effectively. This paper shows that in advanced account for and justify the latencies, especially the cache hit time, technologies it is possible to implement a single-chip multiproces- associated with the two microarchitectures. Second, we develop sor in the same area as a wide issue superscalar processor. We find floor-plans and carefully allocate resources to the two microarchi- that for applications with little parallelism the performance of the tectures so that they require an equal amount of die area. Third, we two microarchitectures is comparable. For applications with large evaluate these archi