（毕业论文毕业设计）-HDB3编码器的FPGA实现.docVIP

内蒙古科技大学毕业说明书（毕业论文） PAGE PAGE I l 内蒙古科技大学 本科生毕业设计说明书（毕业论文） 题 目：HDB3编码器的FPGA实现 学生姓名： 学 号： 专 业：电子信息工程 班 级：信息 指导教师： HDB3编码器的FPGA实现 摘 要 数字基带信号的要求主要有两点，第一是对各代码的要求，期望将原始信息符号编制成适合于传输用的码型；第二是对所选的码型的波形的要求，期望波形适宜于在信道中传输。HDB3(三阶高密度双极性码)因其具有无直流分量、较少低频分量和连零位数目最多不超过三个,以及便于提取定时信息和具有检错能力等特点，所以选择了 HDB3码 。本文介绍了HDB3 码的编解码原理，分析了HDB3 码较其它码型所具有的优势，结合可编程逻辑器件集成度高，速度快，功耗低的特点，选用Xilinx公司的Spartan-3 系列FPGA(Field Programmable Gate Array) 芯片Spartan-3E进行HDB3 编解码电路的实现。 通过仿真，观察到电路各点的仿真输出波形与HDB3 码的理论输出值一致。该方法可满足实际的通信系统传输要求，具有实际应用价值。 关键词：数字基带信号；HDB3 ； FPGA ； HDB3 Encoder FPGA Implementation Abstract Digital baseband signals There are two main requirements, the first is the codes requirements, expectations will be compiled for the original information symbols used in the transmission pattern; the second is the selected waveform pattern requirements, expectations waveform suitable for transmission in the channel. HDB3 (high density bipolar order code) because of its non-DC components, the low frequency components, and even fewer the number of zero up to more than three, and to facilitate extraction of timing information and error detection capability with features, so I chose HDB3 code. This article describes the HDB3 code decoding principle of the HDB3 code pattern than the other advantages of combining highly integrated programmable logic devices, high speed, low power consumption, selected Xilinxs Spartan-3 series FPGA(Field Programmable Gate Array) Spartan-3E chip for HDB3 codec circuit implementation. Through simulation, observation points in the simulation of the circuit output waveform and the theoretical output value HDB3 line code. The method can meet the practical requirements of communication systems transmit and has practical value. Keywords: Digital baseband signal; HDB3; FPGA; 目 录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc264443494 摘 要 PAGEREF _Toc264443494 \h I HYPERLINK \l _Toc264443496 Abstract PAGEREF _Toc264443496 \h II HYPERLINK \l _Toc264443497 第一章 绪论