基于fpga的图像加密系统设计与实现-电子与通信工程专业论文.docxVIP

摘 摘 要 万方数据 万方数据 摘 要 传统的数字图像加密使用 PC 机程序完成，而由于 PC 机的结构制约不能并 行处理，实时性较差。FPGA（现场可编程门阵列）的应用为高速数字图像处理 提供了新的解决方案，充分利用 FPGA 的高速性和并行特性，不但在本质上提 高了图像加密处理的速度、降低了成本，而且对实时性要求较高的大数据量图 像加密具有很强的优势。 针对软件图像加密速度慢、系统较复杂、压缩失真等问题，本文介绍了一 种在 Altera 公司 DE2-70 FPGA 硬件平台上所开发的图像加密系统。本系统硬件 部分采用 TRDB-DC2 CMOS 图像传感器采集图像数据，配合 SOPC（可编程片 上系统），用 Nios II 软核处理器对采集的图像进行加密处理，并送 VGA 显示输 出。系统软件部分，将基于混沌类噪声（PN）序列的置乱加密算法结合 FPGA 软核植入实现对数字图像的加密处理，能够在保持图像较高压缩率的情况下完 成不失真的加密存取，并表现出良好的稳定性。程序在 Nios II IDE 环境下采用 C 语言对算法进行编程并通过 Matlab 将加密前后的图像数据进行对比，系统实 现了预期的基本功能，具备可靠性的同时，对于高速实时图像加密有占用资源 少，成本投入低，可移植性强等优势，具有一定的应用价值。 关键词：现场可编程门阵列；Zigzag 变换；二维 DCT；图像加密；失真 I AB ABSTRACT ABSTRACT Traditional digital image encryption algorithms are completed by PC program, but it is hard to process parallelly in real-time due to structural constraints. Since its high-speed and parallelism properties, FPGA (field programmable logic gate array) provides a new solution for digital image process, which not only improves the speed of image encryption and reduces cost essentially, but also has great advantages in image encryption with large amount of data and higher real-time demanding. Aiming at the common issues of image encrypting by software, such as slow speed, complex system and compression distortion, an image encryption system based on the Altera DE2-70 FPGA hardware platform is introduced in this dissertation. For the hardware part, TRDB-DC2 CMOS image sensor is used to capture images and the Nios II soft-core processor is utilized to realize the encryption process combined with SOPC (system on programmable chip). The output is sent to VGA to display. For the software part, block scrambling encryption algorithm based on chaotic pseudo noise (PN) sequence combined with FPGA-based soft-core is employed to encrypt images, which guarantees the undistorted encryption with higher compression ratio, as well as good stability. Program is developed with C language under the environment of Nios II IDE and the comparison between the original image