基于fpga的任务管理器与定时器设计与实现-信号与信息处理专业论文.docxVIP

基于fpga的任务管理器与定时器设计与实现-信号与信息处理专业论文.docx

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基于fpga的任务管理器与定时器设计与实现-信号与信息处理专业论文

万方数据 万方数据 Abstract With the rapid development of technology, embedded systems are favored by more and more industries. Real-time operating system (RTOS) (hereinafter referred to as RTOS) has been very widely used in a lot of industry due to real timeproperty. In the area of aerospace, automotive control, medical and other field which has the strict real-time requirements, RTOS must completethe tasks within the stipulated time. The previous embedded RTOS are implemented with software-based.Till now, the research of algorithms and CPU running rate are mature. So for the software-based RTOS, it’s very difficult to make the real-time property being improved greatly in the way of improving the rate of CPU speed and optimizing RTOS implementation algorithm. The running of software-based RTOS kernel itself occupies CPU, thereby making the reduction of execution speed of the application.Andthe sequential execution of the software code wastes a lot of time. In this paper, FPGA-based hardware real-time operating system HRTOS (hereinafter referred to as HRTOS) is designed against the problem of time wasting and storage wasting.The free open source μC/OS-IIsystemis chosen to be the reference of HRTOS designing.The design of HRTOS is divided into two parts: hardcore and softcore implementation. Hardcore achieve the task management, timers, interrupt controllers and other functions. It can run parallel with the CPU.Softcore retainsthe interface with application.By transplanting the μC/OS-II system to NiosII platform, rewriting the μC/OS-II system code, and setting the hard-core part as the PIO peripheral of NiosII system, the implementations of the HRTOS can be verified. The simulation result of hardcore is given firstly, and then thesystem-level verification result is given. This paper designs the architecture of HRTOS, then completes the implementation of the task manager and timer functions, and gives out the hardware simulation waveforms, and also designed the verifi

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