Anti-ESD Improvement by the Bulk-FOX Structure in HV nLDMOS Devices 高压NLDMOS器件体福克斯结构抗静电性能的改进.pdfVIP

Chapter 73 Anti-ESD Improvement by the Bulk-FOX Structure in HV nLDMOS Devices Shen-Li Chen, Shawn Chang, Yu-Ting Huang, and Shun-Bao Chang Abstract This work is focused on a 0.25 μm 60 V high-voltage nLDMOS devices which will be integrated with a FOX structure in the bulk region, and evaluate the impacts on its anti-ESD protection ability. It is found that as an FOX sturcture adding, and as the FOX area ratio is increased, It2 value will be enhanced too. When the FOX area ratio is about 83.5 %, It2 value has a maximum value ~6A. However, as the FOX area ratio is increased, the Ron value will be declined. From the experimental data, it is revealed that V (V ) value decreased more than 16.9 % t1 h (35.6 %), anti-ESD ability increased more than 170.2 %, and Ron decreased more than 81.2 % as compared with the Ref. DUT. Keywords Electrostatic discharge (ESD) • Field oxide (FOX) • Holding voltage (Vh) • n-Channel lateral-diffused MOS (nLDMOS) • On-resistance (Ron) • Secondary breakdown current (It2) • Trigger voltage (Vt1) 73.1 Introduction High-voltage laterally diffused MOS transistors (LDMOS) are often used in a power I/O driver circuits or a high-voltage (HV) electrostatic discharge protection device, so how to design a high anti-ESD ability and high latch-up immunity are in need during a high-voltage operating environment. In order to achieve the required ESD ability, ESD protection devices are often designing with a large cell size area. Usually, a designing by a parallel multi-finger structure is used to reduce the cell across length. Thus, a typical multi-finger gate-grounded nMOS (GGnMOS) com- ponent is widely used in the ESD protection circuits. However, many studies have shown that a multi-finger structure of GGnMOS cannot uniformly turn-on in an ESD bombardment [ 1–4]. Therefore, fo