A Compact Power-Efficient 3 V CMOS Rail-to-Rail InputOutput Operational Amplifier for VLSI Cell Libraries 一种用于VLSI单元库的紧凑型节能3V CMOS轨间输入输出运算放大器.pdfVIP
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IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL. 29. NO I ? . DECEMBER 1994 1 SO5
A Compact Power-Efficient 3 V CMOS
Rail-to-Rail Input/Output Operational
Amplifier for VLSI Cell Libraries
Ron Hogervorst, John P. Tero, Ruud G. H. Eschauzier, and Johan H. Huijsing
Abstruct- This paper presents a two-stage, compact, power- circuit and the class-AB control. The transconductance of
efficient 3 V CMOS operational amplifier with rail-to-rail input the input stage varies strongly with the common-mode input
and output ranges. Because of its small die area of 0.04 mm, it is voltage, which impedes an optimal frequency compensation.
very suitable as a VLSI library cell. The floating class-AB control
is shifted into the summing circuit, which results in a noise and Moreover, the quiescent current in the output transistors de-
offset of the amplifier which are comparable to that of a three pends on supply voltage variations.
stage amplifier. A floating current source biases the combined In this paper a compact, two-stage, 3 V CMOS opamp with
summing circuit and the class-AB control. This current source rail-to-rail input and output ranges will be presented. Because
has the same structure as the class-AB control which provides a of its small die area, it is very suitable as a VLSI library cell.
power-supply-independent quiescent current. Using the compact
architecture, a 2.6 MHz amplifier with Miller compensation and The opamp contains a constant-g,, rail-to-rail input stage and a
a 6.4 MHz amplifier with casco
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