eetop.cn_design technique for cascoded CMOS opamp英文学习资料 .pdfVIP

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL SC-19, NO 6, DECEMBER 1984 919 Design Techniques for Cascoded CMOS Op Amps with Improved PSRR and Common-Mode Input Range DAVID B RIBNER AND MILES A. COPELAND Abstract —Intemafly compensated CMOS op amps have ~en widely used in sampled-analog signaf processing applications over the past several years; however, the popular two-stage op amp suffers from poor ac power supply rejection to one of the power rails. This paper presents two circuits that overcome the PSRR problems of the earlier amplifiec one for virtual ground applications such as switched-capacitor integrators, and the other for buffer applications requiring wide common-mode input range. Small v,+ signal an@ysis is developed for the open loop and PSRR responses of the two amplifiers. In addition, design guidelines are suggested and test results are presented. ‘%l’s~1+ I. INTRODUCTION v~s S the maturity of analog MOS amplifier technology Fig. 1. A conventional internally compensated CMOS op amp. A progresses, the basic issues of designing workable