超净室安全规范手册(英文版).pdfVIP

EE – 504L Solid State Processing and Integrated Circuit Laboratory Dr. Kian Kaviani USC Viterbi School of Engineering Ming Hsieh Electrical Engineering Dept. 1/13/2015 Dr. Kian Kaviani - Spring 2015- EE-504L 1 Course Description:  This is a course intended for the first year graduate students in Engineering and sciences who are interested in hands on approach toward learning of basic operations in fabrication testing of integrated circuits.  The course has two components. One is the weekly lecture, which runs twice a week,for approximately 60 - 75 minutes each. In these lectures basic principles used in IC fabrications are discussed and state-of-the-art approaches are also presented.  The second component of the course comprises of weekly laboratory work, which runs for approximately 3 hours for a period of eleven weeks. Every student will process his/her 3” Silicon wafer individually under the supervision of the teaching assistants. The finished wafers are then electrically tested for the extraction of the parameters of various devices on the wafer. 1/13/2015 Dr. Kian Kaviani - Spring 2015- EE-504L 2 Grading Policy 1. Homework 25% 2. CMOS Quiz 10% 3. Midterm 20% 4. Lab Performance 20% 5. Final Written Report 10% 6. Final Exam 15% Total: 100% 1/13/2015 Dr. Kian Kaviani - Spring 2015- EE-504L 3 Scaling and Miniaturization 1/13/2015 Dr. Kian Kaviani - Spring 2015- EE-504L 4 Moore‟s Law Number of compon