Ralink芯片技术相关参数.docVIP

DSRT2571W_V3.3_062207 - 1 - RT2571W Revision June 22, 2007 The RT2571W is a highly integrated MAC/baseband processor to support IEEE Functional Block Diagram Applications ? IEEE802.11a/b/g Wireless Local Area Networks ? Wireless Portable Device/Notebook Computer USB host interface Revision June 22, 2007 Pin Out TFBGA180 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A ADDR10ADDR9ADDR6ADDR0DATA4NC NC B NC SUSPE NDM ADDR7ADDR3DATA6PCMRE GN WAITN NC NC GPIO7C NC GND3_U20 VCC3_U 20 ADDR15ADDR5ADDR2DATA5NC PLL NC GPIO6 D VCC3IO_U20 RPU GND18_U20 VCC18_U20 NC ADDR4ADDR1DATA7DATA2DATA3 NC R/B PLLVDD A GPIO5E TEST_EN GNDA_U20 NC VDD_C1 8 GND VDDIO GND GND VDD_C1 NC GPIO4F SCAN_EN UDCLK SEL PLL_MODE VCCA_U20 GND NC G NC NC NC GPIO2 RF_SD H NC VDD_C18 GND 8 RF_SCL K J NC EEDI LED_ACT ANSEL_ NC NC K NC ANSEL_N VSS18VSS18VSS18VREF025N VREF02 5P L NC 8 VDDIO IREF VCC18VCC18VCC33D VCC33A NC NC A1 VDDIO AGC VCC18 GNDSH _DACVSS33A VCC33D N A VGA_PULSE AGC_LNA0 LUE1NC RFTXI_P RFTXI_ N NC VCC33A VREFN RFRXQ_ N P RF_PE LUE0 VGA_VALUE2 VGA_VALUE3 LUE4NC RFTXQ_P N NC TSSI_G RFRXI_P RFRXI_N VREFP RFRXQ_ P (The remainder of this page is left blank intentionally Revision June 22, 2007 Pin Description *Notation: I (Input., O (Output, I/O (Bi-direction Pin No Pin Name I/O type Description Global signals (9 E4 GRSTN I, pull-up Global reset, active low. E1 TEST_EN I, pull-down Scan test mode enable. Connect to GND 0: Normal mode. 1: Test mode. F1 SCAN_EN I, pull-down Scan enable. Connect to GND 0: Normal mode. 1: Scan mode. G4 UDCLK O F3 PLL_MODE I Internal PLL mode. F2 UDCLKSEL I, pull-down A13 PLLCLK I C12 BYPASSPLL B6 SUSPENDM O RF interface (37 J4 Antenna select positive output. K2 Antenna select negative output. O AGC LNA control signals. O VGA pulse for zero-IF RF. O VGA value output for zero-IF RF. O RADIO_PE control to RF system. RF_LE O RF latch enable of serial control interface. TR_SW_P O TR_SW positive output. L2 TR_SW_N O TR_SW negative output. H14 RF_SCLK O RF serial interface clock. G14