【笔记】16位乘法器学习笔记(Verilog语言源程序+仿真程序).docx

LCD1602 显示源程序如下：module lcd1602(input clk,//60Minput rst_n, output lcd_p, output lcd_n, output reg lcd_rs, output lcd_rw,output reg lcd_en,//Backlight Source + lcd 屏幕背光//Backlight Source -//0:write order; 1:write data//0:write data;1:read data//negedge 在 lcd_en 下降沿需保证数据有效output reg [7:0] lcd_data); LCD1602 显示源程序如下： module lcd1602(input clk, //60M input rst_n, output lcd_p, output lcd_n, output reg lcd_rs, output lcd_rw, output reg lcd_en, //Backlight Source + lcd 屏幕背光 //Backlight Source - //0:write order; 1:write data //0:write data; 1:read data //negedge 在 lcd_en 下降沿需保证数据有效 output reg [7:0] lcd_data); mux16 mul(.rst_n(rst_n),.clk(clk),.start(start),.ain(data0),.bin(data1),.yout(data2),.done(done));// 关联 端口名称 //--------------------lcd1602 order---------------------------- parameter Mode_Set Cursor_Set = = 8h31, 8h0c, 8h06, 8h01; // 功能设置， //光标设置 //输入模式设置 //清屏设置 Address_Set = Clear_Set = /****************************LCD1602 Display Data****************************/ wire [7:0] data_r0,data_r1,data_r2; // 乘数、被乘数 wire [15:0]data0,data1; // 结果显示 wire [31:0]data2; wire [7:0] addr; wire start,done; //write address assign data_r0 = 8h30 + data0[7:0] ; // 8h30 在 LCD1602 上显示值为 0； assign data_r1 = 8h30 + data1[7:0] ; assign data_r2 = 8h30 + data2[7:0]; //-------------------address------------------ assign addr = 8h80; /****************************LCD1602 Driver****************************/ //-----------------------lcd1602 clk_en--------------------- reg [31:0] cnt; reg lcd_clk_en; always @(posedge clk or negedge rst_n) begin if(.rst_n) begin cnt = 1b0; lcd_clk_en = 1b0; endelse if(cnt == 32h24999) beginlcd_clk_en = 1b1; cnt = 1b0;endelsebegincnt = cnt + 1b1; lcd_clk_en = 1b0;end//600usend//-----------------------lcd1602 display state-------------------------------------------reg [6:0] state;always@(posedge clk or negedge rst_n) begin end else if(cnt == 32h24999) begin lcd_clk_en = 1b1; cnt = 1b0; end else begin cnt = cnt + 1b1; lcd_clk_en = 1b0; end //600us end //-------------