总线定义文档归纳.pdfVIP

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  • 2021-11-28 发布于福建
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ISA 总线定义 ISA 是 Industry Standard Architecture 的缩写 接口卡的外观 插槽的外观 引脚定义 引脚 定义 方向 说明 A1 /I/O CH CK I/O channel check; active low=parity error A2 D7 Data bit 7 A3 D6 Data bit 6 A4 D5 Data bit 5 A5 D4 Data bit 4 A6 D3 Data bit 3 A7 D2 Data bit 2 A8 D1 Data bit 1 A9 D0 Data bit 0 A10 I/O CH RDY I/O Channel ready, pulled low to lengthen memory cycles A11 AEN Address enable; active high when DMA controls bus A12 A19 Address bit 19 A13 A18 Address bit 18 A14 A17 Address bit 17 A15 A16 Address bit 16 A16 A15 Address bit 15 A17 A14 Address bit 14 A18 A13 Address bit 13 A19 A12 Address bit 12 A20 A11 Address bit 11 A21 A10 Address bit 10 A22 A9 Address bit 9 A23 A8 Address bit 8 A24 A7 Address bit 7 A25 A6 Address bit 6 A26 A5 Address bit 5 A27 A4 Address bit 4 A28 A3 Address bit 3 A29 A2 Address bit 2 A30 A1 Address bit 1 A31 A0 Address bit 0 B1 GND Ground B2 RESET Active high to reset or initialize system logic B3 +5V +5 VDC B4 IRQ2 Interrupt Request 2 B5 -5VDC -5 VDC B6 DRQ2 DMA Request 2 B7 -12VDC -12 VDC B8 /NOWS No WaitState B9 +12VDC +12 VDC B10 GND Ground B11 /SMEMW System Memory Write B12 /

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