arithmetic logic样式编辑母版文本样式.pptxVIP

Arithmetic CircuitsYang Jundragon@seu.edu.cn Generic Digital ProcessormemoryaddressCPUPC200dataADD r5,r1,r3ADD r5,r1,r3IR200 Memory systemCPU fetches data, instructions from a memory hierarchy:MainmemoryCPUL2cacheL1cache Caches and CPUsaddressdatacachemainmemoryCPUcachecontrolleraddressdatadata The Instruction PipelineARM ThumbRegister(s) read from Register BankShift and ALU operationWrite register(s) back to Register BankPC - 8 PC - 4EXECUTEPC - 4 PC - 2DECODEDecoding of registers used in instructionPC PCFETCHInstruction fetched from memory ARM7TDM CoreInstructionDecodeD[31:0]Write DataRegisterRead DataRegisterAddressIncrementerBRegisterBankMultiplierBarrelShifterALUALUPCAA[31:0]AddressRegisterVectors Building Blocks CPUArithmetic unit Bit-sliced datapath(adder, multiplier, shifter, comparator, etc.)-Memory- RAM, ROM, Buffers, Shift registers, register fileControl- Finite state machine (PLA, random logic.)- Counters Bit-Sliced Design QuizWhy we must learn these?Memory: constructed with registersAdder : constructed with combinational logicShiter :constructed with combinational logic.So, why? Adder Full-Adder P、G, DDefine 3 new variable which ONLY depend on A, BGenerate (G) = ABPropagate (P) = A^BDelete = A BNote: C0=G+PCi=G+(A+B)CiHSPICE DEMO The Ripple-Carry AdderWorst case delay linear with the number of bitstd = O(N)tadder = (N-1)tcarry + tsumGoal: Make the fastest possible carry path circuit Complimentary Static CMOS Full Adder？ 28 TransistorsInversion Property Minimize Critical PathExploit Inversion Property A Better Structure: The Mirror Adder Carry-Bypass AdderAlso called Carry-Skip Carry-Bypass Adder (cont.)tadder = tsetup + Mtcarry + (N/M-1)tbypass + (M-1)tcarry + tsum Carry Ripple versus Carry Bypass Carry-Select Adder Carry Select Adder: Critical Path Linear Carry Select Square Root Carry Select Adder Delays - Comparison Quiz-Full Adder？ Shifter The Binary Shifter The Barrel ShifterArea Dominated by Wiring 4x4 barrel shifterWidthbarrel ~ 2 pm