AX58200 EtherCAT从站专用通讯SoC数据手册_v100.pdf

AX58200

EtherCATSlaveControllerSoC

FeaturesDocumentNo:AX58200/V1.00/06/03/20

ARM®Cortex®-M4processor,runningupto192OneUSB2.0HighSpeedOTGwithon-chip

MHztransceiver

Built-inMemoryProtectionUnit(MPU)OneIEEEStd.802.310/100MbpsEthernet

Built-inNestedVectoredInterruptControllerMACwithRMII

(NVIC)Upto6setsofUARTs

HardwareIEEE754compliantFloating-pointThreesetsofISO-7816-3

Unit(FPU)ThreesetsofI2CdeviceswithMaster/Slave

DSPextensionwithhardwaredividerandmode

single-cycle32-bithardwaremultiplierOneSPIMastersupportsmaximum32MB

externalSPIFlashmemory

On-chipMemory

OnesetofQuad-SPIcontrollerwith

Dualbank512KBFlashsize(APROM)for

Master/Slavemode

Over-The-Air(OTA)upgrade

OnesetofI2SinterfacewithMaster/Slave

On-chipFlashprogrammingwithIn-Chipmode

Programming(ICP),In-SystemProgramming

TwosetsofUSCI,configuredasUART,SPIor

(ISP)andIn-ApplicationProgramming(IA