PIPO%3a一种基于网络处理器的新型多通道报文缓冲调度机制.pdfVIP

PIPO: 一种基于网络处理器的新型多通道报文缓冲调度机制 张晓明 孙志刚 张民选 (国防科学技术大学计算机学院 长沙 410073) (xiaomingzone@) 摘 要 随着链路速度的增加，为避免拥塞所导致的报文丢失，网络处理器需使用大容量、高带 宽的多通道报文缓冲存储器。如何高效利用多通道报文缓冲存储器的带宽成为网络处理器设计的 一个重要问题。在分析网络处理器中报文缓冲特点的基础上，提出了一种流水输入/ 并行输出 （PIPO ）的新型多通道报文缓冲调度机制，采用流水输入调度技术处理输入端的写请求序列，采 用并行输出调度技术调度输出端的读请求序列，同时采用存储访问策略优化输入/输出端的访存 效率。使用简化的存储访问模型评价了 PIPO 的带宽利用效率，并通过模拟实验与传统的 FCFS 调度方法相比较，PIPO 调度方法具有更高的带宽利用率和更低的瞬时带宽抖动。 关键词 网络处理器；报文缓冲；行局部性；存储访问策略 中图法分类号 TP393 PIPO: A novel Multi-Channel Schedule Scheme of Packet Buffering for Network Processors ZHANG Xiao-Ming SUN Zhi-Gang ZHANG Min-Xuan ( School of Computer Science, National University of Defense Technology, ChangSha 410073 ) Abstract As the link rate increases rapidly, Multi-channel Packet buffering memory with large size and high bandwidth is used in network processors (NPs) to avoid congestion. How to efficiently utilize the high bandwidth of the multi-channel memory for Packet buffering becomes an important problem in NPs’ Design. According to the characterization of packet buffering in NPs, a novel Multi-Channel Schedule Scheme of Packet Buffering is presented, which is based on Pipelining Input and Parallel Output (PIPO). In PIPO-based packet buffering scheme, write-request packet serials are handled through pipelining at input ports while read-request packet serials are handled in parallel at output ports, and at the same time memory access policies are used to optimize the access efficiency at both input and output ports. Bandwidth efficiency is evaluated theoretically by a simplified memory access model. Compared with the traditional First Co