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职位总览： 工作地点：上海 ASIC Design Engineer ASIC设计工程师 ASIC Design Engineer – Video ASIC设计工程师–图像视频处理 ASIC Design Engineer – Wireless ASIC设计工程师–无线通信 Wireless Algorithm Engineer 无线通信算法工程师 System Engineer 系统工程师 Embedded Software Engineer 嵌入式软件工程师 Digital Design Engineer 数字电路设计工程师 RFIC Test Engineer 射频集成电路测试工程师 工作地点：武汉 Image Quality Engineer 图像质量工程师 Algorithm Development Engineer 图像算法研发工程师 Software Developing Engineer – Cloud Computing 软件开发工程师-云计算 Software Developing Engineer – Mobile 软件开发工程师 – 移动终端开发 Software Developing Engineer – Optimization 软件开发工程师-算法优化 Software Developing Engineer – Web 软件开发工程师-云服务及网站开发 Software Developing Engineer – Embedded 软件开发工程师-嵌入式开发 Software QA Engineer 软件测试工程师 工作地点：新加坡 Algorithm Development Engineer 图像算法研发工程师 Software Developing Engineer – Cloud Computing 软件开发工程师-云计算 Software Developing Engineer – Mobile 软件开发工程师 – 移动终端开发详细信息： 工作地点：上海 ASIC Design Engineer Position Overview:　?The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVisions future generation multi-media products.?Responsibilities:　??1. Provide detailed block-level design and documents;?2. Develop and execute thorough block level simulation and lab verification plan;?3. Participate in the FPGA platform development and lab debugging;??4. Participate in block level architecture design;?5. Assisting embedded FW development.?Requirements: MSEE/CE; Strong analytical, and problem solving skills as well as hands-on lab debugging skills; Good knowledge of RTL design and simulation; Able to write C code to model RTL blocks for simulation and verification; Able to write reusable Verilog RTL codes, follow design and DFT guidelines; Able to run synthesis, static timing analysis and formal verification is highly desirable, but not required; Knowledge in languages relevant to the ASIC development process including Verilog, Unix Scripting, Perl and Tcl is strong pl