一款基于0.13μm CMOS工艺,0.1 GHz～18 GHz采用双反馈和噪声消除技术的低噪声放大器设计.pdfVIP

电子器件 第 35 在第4 期 Vol. 35 No.4 2012 年 8 月 Chine~t. Jouffial {Þ f EltclrUl Dni{e- Aug.2012 • A Novel 0.1 GHz -18 GHz LNA in 0.13 阳n CMOS Exploiting Double-Feedback and Noise-Cancellation * UANG Yu.日n ， ZHANG Hong* (Key LaboralOr) 4 Widr BαTJ(l-tp S..m u:onductor M Llniah urul V.刑úS of MmistrJ 0/ Educat llTl, School 0/ M盯， οdectronics ， Xùlian ιnÎver.lay ， Xian 71 田71.ιh阳) Abstract: A novel 1.2 V ,O. 1 GHz -18.0 GHz 叫scacle LNA (Low Noise Amplifier) is repo眈ed. Feedback network is utilized to facilitate broadband matching instead of introducing oscillation. An inverter is employecl as the second stage for noise-cancellation. Low Q inductive peaking and serie~ peaking are included 10 exlencl the operation bandwidth. and the applied inductors are with low area consumption. The LNA achieves a noi附自gure( NF) less than 4 dB with both VO retlection coeilieient better than -10 d H. The maxim咀m forward gain reaches 15.34 dB while the minimum one is 14. S4 dB ，民ain flatness is therefore captured. 11凹 of -4 dBm alone with the 1 dB desensitization point of -24 dBm at 9 GHz are found ,at the expense of 30 mW power dissipation Key words;solid-state components and circuits;computer aided design; UWB( Uhra Wave Banä) LNA( Low Noise Amplifier) ; cascade ; double feedback; noise cancellation EEACC: 1220 ;2570D doi: 10. 3969/j. issn. 1005-9490.2012.04.008 一款基于0.13μm CMOS 工艺，0.1 GHz ~ 18 GHz 采用 双反馈和噪声消除技术的低噪声放大器设计* 梁元，张弘* (西