Design of Low Voltage Folded Cascode （低压折叠共源共栅的设计）.pdfVIP

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Design of Low Voltage Folded Cascode （低压折叠共源共栅的设计）.pdf

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Design of Low Voltage Folded Cascode （低压折叠共源共栅的设计）

Raghuwar Sharan Gautam,P. K. Jain,D. S. Ajnar/ International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 Vol. 2, Issue 1,Jan-Feb 2012, pp.566-570 Design of Low Voltage Folded Cascode Operational Transconductance Amplifier with Optimum Range of Gain and GBW in 0.18µm Technology 1 2 3 Raghuwar Sharan Gautam , P. K. Jain , D. S. Ajnar Electronics Instrumentation Engineering Department, Shri G.S.Institute of Technology and Science, Indore, India Abstract- An optimum OTA topology is done in order II.OPTIMUM TOPOLOGY OTA to optimize MOS transistor sizing. Also, the design of ARCHITECTURE Folded Cascode OTA, which works for frequencies that lead to a baseband circuit design for RF application, is Several fundamental issues exist when selecting an optimal based on transistor sizing methodology. Simulation architecture for the operational transconductance amplifier. results are performed using CADENCE software and This choice aimed both at large gain and large bandwidth virtuoso spectre model for CMOS 0.18μm process performances. In order to achieve high gain, the differential technology, BSIM3V3 model simulator show that the telescopic topologies can be used. This topology designed folded cascode OTA has a 80.5dB DC gain and 566cascade566 both the diffe