FPGA实现蜂鸣器播放音乐实验报告.docVIP

实验报告 功能：利用FPGA开发板板子实现一段简单的简谱的播放。 工具：Spartan-3E_Starter_Kit开发板一块，PC机一台，ISE开发环境；无源蜂鸣器一个。 语言：VHDL和Verilog。 源码： //`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: XMU-EED // Engineer: BMW007 // Create Date: 22:59:56 03/20/2014 // Design Name: beeper_play_music // Module Name: beeper_play_music // Project Name: beeper_play_music // Target Devices: PC Win7/OS // Tool versions: ISE13.2 // Description: The function of this project is making the beeper play simple music. // Dependencies: /// Revision: // Revision 0.01 - File Created // Additional Comments: ////////////////////////////////////////////////////////////////////////////////// module beeper_play_music(clk,rst,beep,music_out); input clk,rst; output beep,music_out; reg beep_o; reg[7:0] state; reg[16:0] count,count_end; reg[23:0] count1; assign music_out=beep; parameter L_1=17d95555, //261.63 L_2=17d85130, //293.67 L_3=17d75843, //329.63 L_4=17d75843, //349.23 L_5=17d63777, //391.99 L_6=17d56818, //440 L_7=17d50619, //493.88 M_1=17d46970,//532.25 M_2=17d42566,//587.33 M_3=16d37921,//659.25 M_4=16d35793,//698.46 M_5=16d31888,//783.99 M_6=16d28409,//880 M_7=16d25310,//987.76 H_1=16d23889,//1046.50 H_2=16d21283,//1174.66 H_3=16d18961,//1318.51 H_4=16d17897,//1396.92 H_5=16d15944,//1567.98 H_6=16d14205,//1760 H_7=16d12654;//1975.52 parameter TIME=8000000; assign beep=beep_o; always@(posedge clk,posedge rst) begin if(rst) begin count = 16b0; beep_o = 1b0; end else if(count==count_end) begin count = 16b0; beep_o = ~beep_o; end else count = count+1b1; end always@(posedge clk, posedge rst) begin if(rst) begin count1 =24b0; state = 8b0; end else if(count1TIME) count1 = count1+1b1; else //(count1==TIME) begin