pcb深入学习（PCB study hard）.docVIP

pcb深入学习（PCB study hard） Anti-interference design principle Thermal design principle Seismic design principle Testable principle Power line design: select the right power, as far as possible to widen the power line to ensure the power line, the bottom line and the direction of data transmission, the power supply to add decoupling capacitors Bottom line design: analog and digital separation, try to use a single point grounding, as far as possible to widen the bottom line The sensitive circuit is connected to a stable ground reference source on P CB semi partition design, separate circuit noise and low-frequency circuit wide wide Minimize the area of the ground loop Component configuration: parallel signal lines do not have too long to ensure the PCB clock generator, CPU oscillator and clock input as close as possible at the same time away from other low frequency device components should be configured around the core device, reduce line length to partition the layout of the PCB board Consider the position and direction of the PCB board in the case and shorten the lead between the high frequency components Decoupling capacitor configuration: a charging and discharging capacitor shall be added to each of the 10 integrated circuits Lead capacitor is used in low frequency patch capacitors for high frequency Each integrated chip should be assigned a 0.1uF capacitor The ability to resist noise is weak, and when the power is changed, the capacitor with high frequency and decoupling capacitor should be added Do not use vias between capacitors Decoupling capacitor leads should not be too long Reduce noise and electromagnetic interference principle: use 45 as much as possible A series resistance method is used to reduce the jump rate of the edge of the circuit signal The shell of quartz crystal should be earthed The unused door circuit should not be left vacant The clock line is perpendicular to the IO line and has little interference Try to keep the clocks electromotive force