基于FPGA的QDPSK调制系统的设计实现.doc

毕业设计说明书（论文）中文摘要 基于FPGA的QDPSK调制系统的设计实现 内 容 摘 要 QDPSK（四相相对移相调制）是一种宽带和功率相对高效率的调制技术。用FPGA实现调制器具有体积小、功耗低、集成度高、可软件升级、抗干扰能力强的特点。 论文介绍了FPGA的相关知识，几种常见的相位调制方式及本系统的实现平台Max+plusⅡ和QDPSK调制系统的理论算法。然后重点讲述了QDPSK调制系统的具体实现过程。首先将调制系统分为软件和硬件两大部分，又将每部分分成了几个小的模块来综合实现。软件部分包括：时钟分频模块、伪随机序列模块、串/并转换模块、差分编码模块和调制模块，这部分是通过Max+plusⅡ实现的。硬件部分包括：核心芯片、D/A转换模块、低通滤波模块和输出显示模块，这部分是通过ZY11EDA13BE实验箱和低通模块电路及数字示波器完成的。 论文验证了系统的可行性，同时也体现了此系统误码率低等优点，说明QDPSK调制确实优于传统的调制算法。 关键字　　FPGA QDPSK调制 仿真 差分编码 毕业设计说明书（论文）外文摘要 FPGA-based modulation system design and implementation QDPSK ABSTRACT QDPSK (four-phase relative phase shift modulation) is a relatively high bandwidth and power efficient modulation techniques.The modem realized by FPGA has many advantages, such as smaller volume, low-power dissipation, integrity high, updated of software, capability of anti-jamming and so on. The thesis introduces the FPGA-related knowledge, a number of common phase modulation metho and the realization of the system platform for Max+plusⅡand the algorithm theory of the QDPSK modulation system.Then focuses on the concrete realization of the process of the QDPSK modulation system. The modulation system is divided into two major parts as software and hardware to achieve. Software part include: the clock frequency module, pseudo-random sequence module, Serial and parallel conversion module, differential coding module and modulation module, which is realized through the Max+plusⅡ. Hardware part include: core chips, D/A conversion module, low-pass filter module and output module, which is achieved through the ZY11EDA13BE module boxes and low-pass filter and the digital oscilloscope. The thesis verifies the feasibility of the system, and also reflects the low bit error rate advantages of the system. The QDPSK modulation is indeed superior to the traditional modulation methods. Keywords FPGA QDPSK modulation Simulation differential encoding 目 录 1　引言 1 1.1　课题背景及其意义 1 1.2　FPGA的结构及设计流程 1 1.2.1 FPGA的结构 1 1