ieeen无线传输标准中ldpc译码的研究和移位器硬件实现-research on ldpc decoding in ieeen wireless transmission standard and hardware implementation of shifter.docx

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2018-05-29 发布于上海
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ieeen无线传输标准中ldpc译码的研究和移位器硬件实现-research on ldpc decoding in ieeen wireless transmission standard and hardware implementation of shifter.docx

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AbstractAs a channel code, LDPC (Low Density Parity Check) has received considerable attention due to its excellent error-correcting ability, high throughput and low decoding complexity. Therefore, LDPC code has been adopted in some communication standards such as DVB-S2, IEEE802.11n, and IEEE802.16e. With the further research of LDPC code, it is likely to be applied on the the future fourth generation mobile communication systems. According to IEEE802.11n standard, the LDPC decoding algorithm and shifter implementation of decoder are discussed.Firstly, the development of channel code and the research status of LDPC code are introduced. Then, LDPC code’s basic principle and LDPC code based on IEEE 802.11n standard are presented. After introducing the decoding algorithm and the modified algorithms, the thesis particularly analyzes normalized BP-based algorithm, and further determines the decoding algorithm as the main research focus of LDPC code in IEEE802.11n standard.Secondly, the simulation platform with MATLAB is builded, and then the normalized factors are computed as 1.15, 1.25, 1.3, 1.35 respectively by simulating the four code rates (R=1/2, R=2/3, R=3/4, R=5/6) in 802.11n standard. Also, after building simulation platform with C language, this thesis carries out fixed-point simulation towards normalized BP-based decoding algorithm, compares with LLR and Min-Sum algorithms, and determines the word-length is 7 bits.Finally, LDPC code’s hardware structure is discussed. The three modules of addrgen, shifter and reversed shifter, according to the partly parallel decoding structure, are implemented. Especially to the modules of shifter and reversed shifter, four popular shifters are compared.According to the above modules, the RTL codes are written and the simulation results are obtained on the Modelsim-based functional simulation test platform. Also, the thesis makes use of DC to synthesize these modules, and synchronously utilizes ISE to synthesize them based on