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pxi高速数字示波器设计技术分析-analysis of pxi high speed digital oscilloscope design technology
functiontimingdevicesarewidelyspaced,convenientdebuggingboardvalidationwork.Functiontoachievefullintegrationintothefinalplan,wewillachievethedesigngoal.Keywords:PXI,FPGA,CPLD,ADC,PCIinterface目录摘要....................................................................................................................IAbstract.................................................................................................................II第1章绪论.........................................................................................................11.1数字示波器发展概况及其工作原理............................................................11.1.1数字示波器发展概况............................................................................11.1.2数字示波器工作原理............................................................................21.2总线发展概况..............................................................................................41.3选题的意义和设计目标...............................................................................5第2章系统总体方案...........................................................................................62.1系统工作原理..............................................................................................62.2总体设计方案..............................................................................................82.3硬件设计......................................................................................................92.4软件设计....................................................................................................142.5本章小结....................................................................................................15第3章控制系统.................................................................................................163.1控制系统总体方案.....................................................................................163.2FPGA控制模块详细设计163.2.1CPLD与FPGA通信发送控制模块173.2.2高速数据接收模块..............................................................................183.2.3缓存模块控制..........
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