低噪声鉴频鉴相器和环路滤波器的设计-电路与系统专业论文.docx

摘要 摘要 I I 摘要 近几十年来，无线通信技术和微电子技术得到了蓬勃发展，锁相环频率合成 器是无线通信系统前端的一个关键部件，在许多领域得到广泛的应用，如数字电 视高频调谐器。当前的高频调谐器多采用以锁相环(Phase-Locked Loop, PLL)技术 为基础的锁相频率合成器，与以往的电视调谐器相比，采用锁相频率合成器的调 谐器具有稳定度高及频率调节范围宽等优点。 锁相环式频率合成器一般由本地振荡器、参考分频器、可编程分频器、鉴频 鉴相器(Phase-Frequency Detector, PFD)、低通滤波器(Low Pass Filter, LPF)和压控 振荡器(Voltage Controlled Oscillator, VCO)构成。本文仅对鉴频鉴相器和低通滤波 器进行深入的分析和研究，并详细地阐述了一种高性能的电路结构。论文主要内 容如下： 首先，本文分析了锁相环的环路传输特性、噪声性能，并讨论了环路噪声特 性及环路带宽的优化方法。 其次文章从 PFD/LPF 的结构发展及工作原理出发，给出了有关 PFD/LPF 各 种不同结构电路的优缺点及原理上的差异。同时，深入分析了鉴频鉴相器、环路 滤波器对系统性能的影响。 低通滤波器的主要功能是滤除环路噪声、优化环路带宽并为 VCO 提供稳定 的控制电压。通过对各种低通滤波器的分析与比较，给出二阶和三阶无源环路滤 波器的设计方案，优化了本课题采用的三阶无源环路滤波器的设计参数，仿真结 果满足了设计指标。这种电路结构能很好的滤除环路中的噪声和杂散，给 VCO 提供稳定的控制电压，并且功耗很小。 鉴频鉴相器最突出的作用是它能显著的加快锁相环的速度，增大锁相环的捕 获范围。论文通过对国内外各种 PFD 电路结构性能的综合分析与比较，结合 PLL 环路对 PFD 的性能要求，着重描述了本文设计的 PFD 的电路结构，阐述了一种 基于 SCL 结构的高精度全差分型 PFD 设计思想。 关键词：锁相环；鉴频鉴相器；低通滤波器；噪声 Abs Abstract II II Abstract Wireless communication technology and microelectronics technology has been booming for over a decade. The PLL-based frequency synthesizer, which is a key component in communication front end, is applied in many fields, such as digital TV tuner. The tuner, who employs the PLL as the basic technology has higher stability and wider frequency tuning range compared with the outdated television tuner. In generally, the PLL based frequency synthesizer includes local oscillator, reference frequency divider, programmable frequency divider, frequency phase detector and low-pass filter. The frequency phase detector and low pass filter are analyzed and studied, and a high-performance circuit is described in detail. The main contents are as follows: Firstly, the PLL loop transfer characteristic and noise performance are analyzed, and the noise characteristic and bandwidth optimized method are also discussed. Secondly, beginning with the development of the PFD/LPF structure and its work principle, the paper describes the advantage and disadvantage of every structure and the difference of the principle. Furthermor