网站大量收购闲置独家精品文档,联系QQ:2885784924

低截获混合扩频接收机设计及FPGA实现-空间信息科学技术专业论文.docx

低截获混合扩频接收机设计及FPGA实现-空间信息科学技术专业论文.docx

  1. 1、本文档共61页,可阅读全部内容。
  2. 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
  3. 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载
  4. 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
低截获混合扩频接收机设计及FPGA实现-空间信息科学技术专业论文

万方数据 万方数据 摘 要 宽带、高速跳频和直接序列扩频相结合的混合扩频系统具有较强的抗截获能 力和抗干扰能力。本文给出了一种截获概率很低的混合式扩频通信系统接收机方 案,进行了硬件结构设计,完成了相关模块的 FPGA 实现,具体工作如下: 1. 针对系统的突发性和低截获性,本文提出了一种长码实时捕获方案;设计 了一种基于循环码移键控(CCSK)的高阶 M 元解扩和迟早环同步跟踪方案;给出了 系统相关接口。 2. 完成了相关模块的 FPGA 实现,包括:基于部分匹配滤波-FFT 算法的长码 捕获模块、基于延迟锁定环的同步跟踪模块、基于高阶 M 元扩频系统 FFT 快速相 关解扩模块以及 FPGA 控制 FX2 芯片 Slave FIFO 模式的数据接口模块。通过波形 仿真测试,验证了这些 FPGA 模块功能的正确性。 3. 选定了系统器件,完成了接收机的硬件平台设计。 4. 完成了接收机的测试。测试结果表明接收机的性能可以达到设计指标。 关键词:长码捕获 高阶 M 元解扩 Slave FIFO 模式 FPGA Abstract A hybrid spectrum spreading communication system, which combines broadband high-speed frequency-hopping and direct sequence spectrum spreading, possesses strong ability in anti-interception and anti-jamming. This paper proposed a receiver scheme in a hybrid spectrum spreading communication system, which possess very low probability of interception; and designed its hardware structure, as well as finished its related FPGA implementation. The main contributions are as follows: According to the requirement of burstiness and low probability of interception, a synchronization acquisition of long PN code in real time is proposed. A high-order M-ary spectrum spreading system based on CCSK and a synchronization tracking approach based on delay locked loop are both designed. In addition, the corresponding interface is presented. FPGA implementations of the related modules are realized, including long code acquisition module based on part-matched-filter-FFT algorithm, synchronization tracking module based on delay lock loop algorithm, the FFT-based fast correlation despreading module for high-order M-ary spectrum spreading signals and data interface module in FX2’s Slave FIFO mode. Finally, the designed FPGA modules are tested through wave simulation, their function has been verified. Devices are selected to finish the hardware platform of the receiver. The prototype receiver has been tested. And the test result shows that the performance of the receiver meets the designed targets. Keywords: long code ca

文档评论(0)

peili2018 + 关注
实名认证
内容提供者

该用户很懒,什么也没介绍

1亿VIP精品文档

相关文档