从应用的角度谈对外延芯片的一些发展建议.ppt

从封装应用角度看外延芯片的发展 —谈新十年LED外延与芯片的发展 余彬海 博士 副董事长 yubinhai@ 佛山市国星光电股份有限公司 Requirements for LED Epitaxy and Chip From Packaging and Application View Dr. Yu Bin-Hai Vice President yubinhai@ Foshan Nationstar Optoelectronics Co. Ltd SiC, Sapphire Silicon, GaN Nucleation layer N type layer MQW layer P type layer Inspection Masking/Lithography Etching Metallization/Contacts/Mirror Die Attach and Interconnect Phosphor coating Encapsulation and optics Testing and binning Optics Electronics / Driver Mechanical / Fixture Assembly LED Manufacturing Process Market Driving Current LED Challenges Low binning yield: 70% for 7-step MacAdam ellipse Poor long term life performance: 90% lumen maintenance (Energy Star requires 94.6%) Poor angular color uniformity: 60% (80% for CREE and Lumileds) High thermal resistance: normally 5 K/W Unstandardized package size: i.e. OSLON 3030, CREE 3535 Low level phosphor coating quality: mostly by dispersion Packaging and Application Poor epitaxial wavelength uniformity: ±5 nm Poor epitaxial brightness uniformity: ±25 mW Poor epitaxial quality: cannot resist higher work temperature (100 °C) and current (2 A) Unstandardized chip size and specification: i.e. 9X22, 9X26, 10X23, 8X20, 10X18, 9X15 Unstandardized chip optical power binning: i.e. Epistar 290-310 mW, ChiMei 300-320 mW Unmatched chip wavelength claim: 30% out of 2.5 nm Unmatched chip optical power claim: 500 mW and 300 mW show similar luminous flux Poor long term life performance: brightness degradation and color deviation Chip Fabrication and Epitaxial Growth Requirements for Future LED Better epitaxial wavelength uniformity: ±2.5 nm for high binning yield of white LEDs Better epitaxial brightness uniformity: ±10 mW for high binning yield of white LEDs Better epitaxial quality: resist higher work temperature (100 °C) and current (2 A) Larger wafer size to reduce cost Developing system in packaging and wafer level packaging technology to reduce cost Epitaxial Growth Standard c