一种面向内存的混合容错编码调节设计.pdfVIP

一种面向内存的混合容错编码调节设计 1 2 1 1 2 1 李冰 单书畅 高翔 胡瑜 (计算机体系结构国家重点实验室，中国科学院计算技术研究所，北京100190) 1 ( 中国科学院大学，北京100049) 2 摘 要 数据中心服务器等计算平台中采用的大容量内存系统的故障发生率高。高强度的纠错编码虽然能够保证内存系统 的可靠性，但是会带来较高的硬件和功耗开销。运行在数据中心服务器上的应用程序对可靠性的要求不同，混合容错编码能 使内存系统在可靠性与容错代价之间取得较好的权衡。因此，本文提出了一种支持混合容错编码调节的设计，将数据与容错 信息分开存放，通过地址映射逻辑实现容错编码信息的存取。本文提出的设计不仅支持内存的混合容错编码的调节，而且可 扩展到其他类型存储器中。实验结果表明，本容错编码调节设计简单，给系统带来的硬件，及功耗和性能的代价小。 关键词 内存系统；可靠性；容错设计；纠错检错编码 A Hybrid Fault-Tolerant Coding Adjustment Design for Memory System LI Bing1 2 SHAN Shuchang1 GAO Xiang1 2 HU Yu1 1 (State Key Laboratory of Computer Architecture, Institute of Computing Technology ，Chinese Academy of Sciences，Beijing 100190) 2 (University of Chinese Academy of Sciences ，Beijing 100049) Abstract With increasing failure probability of large capacity memory system in datacenter servers, the error correction codes with stronger capability of fault toleratnce should be capable to guarantee the reliability of memory system. However, the high reliability level of ECC induces tremendous performance and power overhead. In addition, the applications ’ requirement of reliability are various. Thus, the hybrid ECC method with adjustable protect stregnths achieves tradeoff between reliability and fault tolerance overhead, is promising. In this paper, we propose a design called Address Mapping Logic to support the adjustment of hybrid ECC codes. The proposed logic is able to store data