边界扫描测试原理与应用.pptVIP

Intelligent Boundary Scan Solutions? Boundary Scan Overview「邊界掃描測試」測試原理與應用 Intelligent Boundary Scan Solutions? No.* BScan Basics Boundary Scan Test測試之定義 所謂邊界(Boundary):係指IC腳端與內部(功能邏輯閘)晶片間之接點。 換言之進行掃描測試IC腳端與晶片間之接點邊界，係所謂之「邊界掃描測試」。 1990年經由IEEE 1149.1加以規格化之BST測試，俗稱為「邊界掃描測試」(Boundary Scan Test) No. * * BScan Basics No. * More Details on IEEE-1149.1= digital interconnection test ? IEEE-1149.4= mixed-signal and analog interconnection test IEEE-1149.5= system level test IEEE-1149.6= Differential AC coupled networks IEEE-1532 = In-System-Programming * BScan Basics No. * History of the Standard 1985 – JETAG (Joint European Test Action Group) 1986 – JTAG (Europe and North America) 1988 – P1149 JTAG v2 (proposal) 1990 – IEEE Std 1149.1 -1990 1993 – IEEE Std 1149.1a-1993 1994 – IEEE Std 1149.1b-1994 (BSDL) 2001 – IEEE Std 1149.1 - 2001 Terms synonyms with IEEE Std 1149.1 Boundary Scan / BSCAN / BST JTAG (Joint Test Action Group) BScan Basics Boundary Scan Test測試之必要性 No. * BScan Basics Boundary Scan Test測試之原理(二) 若PCB印刷基板採用BScan測試相容元件時，最多僅需5條(通常為4條)之專用線，即可測試: 1. Test Data In (TDI ) 2. Test Data Out (TDO) 3. Test Mode Select (TMS) 4. Test Clock (TCK) 5. Test Reset (TRST) =可以省略不用 *註=通常用六個Clock，當作一個Reset No. * BScan Basics Boundary Scan Test測試之原理(三) 所謂[測試存取埠]:TAP(Test Access Port) =係指為進行測試邏輯電路之指令，測試數據或測試結果等數據加入輸入/輸出之串列介面，上述4條信號線，經由外界之電腦主機加以控制，以便執行BScan測試。 No. * BScan Basics Boundary Scan Test測試之功能 1 元件之誤插接及臨近元件的短路測試 2 外界電路與元件間之輸入/輸出信號監視 3 元件間之互接測試(Interconnecting Test) 4 可測試BGA元件之開路與短路作測試 5 Non-BGA IC腳的開路測試 6 可在板上燒錄資料(ISP) Flash / EEPROM (ISP) PLD / FPGA Devices 7 內部邏輯電路之功能測試 No. * * BScan Basics No. * Testbus Signals TMS = Test Mode Select TCK = Test Clock TDI = Test Data In TDO = Test Data Out TMS TCK TDO T A P T A P T A P BScan- device BScan- device BScan- device TDI Testbus interconnection non BScan IC BScan nets IEEE-11