基于fpga的大容量atm交换机接口模块的设计与实现-通信与信息系统专业论文.docxVIP

＼㈣鞘摘 ＼㈣鞘 摘 要 随着超大规模集成电路技术的发展，很多芯片制造商根据各种网络协议与标 准生产出具备相应功能的商用芯片，降低通信网络设备的开发成本，同时缩短开 发周期。为了使不同厂家生产的芯片产品能够互相兼容，IETF、ITU．T和ATM 论坛等标准化组织都定义了大量标准的通信网络设备内部网元间接口。采用 FPGA实现这些接口，可以产生具有自主知识产权的P核，并且对于我国的IC 产业发展具有重要的应用价值。 本文结合项目“基于FPGA的大容量ATM交换样机”，选取部分当前主流的 层间接口进行研究，重点研究了用于连接ATM层和物理层的UTOPIA Level 1、 Level 2和Level 3。在Xilinx公司的Virtex．II系列FPGA上通过编写VHDL代码 实现了这些接口功能，并采用仿真工具ISE Simulator对所设计的UTOPIA接口进 行仿真验证。由于课题组需要，论文还研究了UTOPIA Level 1标准规范在高带宽 上的改进以及UTOPIA接口关于组播的改进方法。作者最后总结全文，提出下一 步研究工作的方向。 关键词：ATM通用测试操作物理层接口 层间接口 硬件描述语言现场可编 程门阵列异步转移模式交换机 AbstractWith Abstract With the development of Very Large—Scale Integration Circuits(VLSI)，many chip manufacturers produce commercial chips with corresponding function on the basis of various network protocols and standards．Therefore communication network equipments’development cost has been reduced，and their development period has been shortened too．111 order to make the chip produced by different manufacturers compatible with each other,the standard organizations such aS IETF,ITU-T．ATM Forum and SO on have defined many standard interfaces between internal network units of communication network equipments．The implementation of these interfaces based on FPGA call produce IP core with independent intellectual property rights，and has much application value on the development of our nation’S IC industry． Sponsored by the project named“Design and Implementation of Large—capacity ATM switch based on FPGA”，this dissertation studied some leading interfaces between layers．mainly including the Universal Test＆Operations PHY Interface (UTOPIA)Level 1，Level 2 and Level 3 for connecting ATM layer and physical layer together．Based on Xilinx Virtex—II FPGA，this dissertation implemented the functions of these interfaces through programming VHSIC Hardware Description Language (VHDL)code．Besides，it simulated and validated the UTOPIA interfaces by ISE Simulator．For the need of study group，this dissertation also investigated the improvement of UTOPIA Level 1 standar