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- 2017-08-30 发布于浙江
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VHDL基于FPGA的数字频率计设计源代码仿真图
VHDL基于FPGA的数字频率计设计+源代码+仿真图
摘 要:本文介绍了一种基于FPGA芯片运用VHDL语言编程的数字频率计。该数字频率计采用等精度法测频,具有测量精度保持恒定,不随所测信号的变化而变化的特点,其测频范围为0-100MHz,误差小于百分之一,拥有选择量程,超量程报警等附属功能。本设计在QuartusⅡ集成开发环境上对程序进行编译、仿真,并下载到FPGA芯片上,通过严格的测试后,能够较准确地测量方波、正弦波、三角波、锯齿波等各种常用的信号频率。4635
关键词:FPGA;VHDL;QuartusⅡ;数字频率计
Design of Digital Frequency Meter Based on FPGA
Abstract: This paper introduces a digital frequency meter based on the FPGA chip with VHDL language programming. The digital frequency meter adopts the method of equal precision measuring frequency, which has the constant precision, and does not change with the changed signal being
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