FPGA在PCI Express总线接口中应用.docVIP

FPGA在PCI Express总线接口中的应用 　　摘 要:随着高速数据采集设备传输带宽的日益提高,开发者需要采用新的计算机总线进行数据传输。这里叙述了使用EP2SGX90系列FPGA完成PCI-Express协议转换,多种DMA工作方式及相关寄存器的作用。以链式DMA传输方式为例,详细介绍该传输方式下的寄存器设置及在驱动程序中的实现范例。实验表明,用FPGA实现协议转换,总线持续传输速率最高可以达到1.2 Gb/s,满足大多数高速数据采集设备的要求。在此摒弃了采用专用总线接口芯片的传统方法,将开发者的逻辑设计和总线协议转换放到同一个FPGA芯片中,不但节省了硬件成本,利用其可编程特性,大大提高了设计可扩展性,同样的硬件很容易完成由PCIE 1.0到PCIE 2.0的升级。 　　关键词:PCIE总线; 可编程器件; DMA传输; 高速数据采集设备 　　中图分类号:TN40; TP336 文献标识码:A 　　文章编号:1004-373X(2010)14-0109-03 　　 　　Application of FPGA in PCI Express Bus Interface 　　SHEN Hui, ZHANG Ping 　　(Nanjing Institute of Electronic Technology, Nanjing 210000, China) 　　Abstract: Along with increase of transmission bandwidth of the high-speed data acquisition systems, the designers have to use the new computer bus to complete the data transmission. The implementation of PCI-Express protocol transform with aplication of FPGA of EP2SGX90 series, the functions of multiple DMA operation modes and the relative register are described. Taking the chained transmissin mode as an example, the register setup in the chained DMA transmission mode and the implementation in the driver are introduced in detail. By this means, the continuous transmission rate of the bus is up to 1.2 GB. The experiment indicates that it can be applied to mass of data acquisition designs. One FPGA chip is adopted to accomplish the logic control and protocol transform of PCI-Express instead of the special bus interface chip. It lowers the design cost and improves the expandability of design. It is is for the same hardware to upgrade the PCIE1.0 to PCIE2.0. 　　Keywords: PCIE bus; FPGA; DMA transfer; high-speed data acquisition equipment 　　 　　0 引 言 　　PCIE(PCI express)是用来互联诸如计算机和通信平台应用中外围设备的第三代高性能I/O总线。PCIE体系结构继承了第二代总线体系结构最有用的特点,采用与PCI相同的使用模型和读/写通信模型,支持各种常见的事务。其存储器、I/O和配置地址空间与PCI的地址空间相同。由于地址空间模型没有变化,所以现有的OS和驱动软件无需进行修改就可以在PCIE系统上运行[1]。 　　PCIE是串行协议,与原有的PCI并行总线相比,它没有大量的数据和控制线,对于硬件电路设计者来说,省去了很多硬件设计工作[2]。PCIE的传输速度远远大于PCI总线,PCIE 1.1版本单个链路的单向吞吐量能达到250 MB/s。对于需要与主机进行大容量传输的系统来说,该总线标准的优势是